<TABLE>
<TR  bgcolor="#C0C0C0">
<TH>Hierarchy</TH>
<TH>Input</TH>
<TH>Constant Input</TH>
<TH>Unused Input</TH>
<TH>Floating Input</TH>
<TH>Output</TH>
<TH>Constant Output</TH>
<TH>Unused Output</TH>
<TH>Floating Output</TH>
<TH>Bidir</TH>
<TH>Constant Bidir</TH>
<TH>Unused Bidir</TH>
<TH>Input only Bidir</TH>
<TH>Output only Bidir</TH>
</TR>
<TR >
<TD >m_lab7_soc|rst_controller_001|alt_rst_req_sync_uq1</TD>
<TD >2</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|rst_controller_001|alt_rst_sync_uq1</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|rst_controller_001</TD>
<TD >33</TD>
<TD >31</TD>
<TD >0</TD>
<TD >31</TD>
<TD >1</TD>
<TD >31</TD>
<TD >31</TD>
<TD >31</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|rst_controller|alt_rst_req_sync_uq1</TD>
<TD >2</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|rst_controller|alt_rst_sync_uq1</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|rst_controller</TD>
<TD >33</TD>
<TD >31</TD>
<TD >0</TD>
<TD >31</TD>
<TD >2</TD>
<TD >31</TD>
<TD >31</TD>
<TD >31</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|irq_mapper</TD>
<TD >2</TD>
<TD >32</TD>
<TD >2</TD>
<TD >32</TD>
<TD >32</TD>
<TD >32</TD>
<TD >32</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|crosser_003|clock_xer</TD>
<TD >124</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|crosser_003</TD>
<TD >126</TD>
<TD >2</TD>
<TD >0</TD>
<TD >2</TD>
<TD >120</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|crosser_002|clock_xer</TD>
<TD >124</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|crosser_002</TD>
<TD >126</TD>
<TD >2</TD>
<TD >0</TD>
<TD >2</TD>
<TD >120</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|crosser_001|clock_xer</TD>
<TD >124</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|crosser_001</TD>
<TD >126</TD>
<TD >2</TD>
<TD >0</TD>
<TD >2</TD>
<TD >120</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|crosser|clock_xer</TD>
<TD >124</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|crosser</TD>
<TD >126</TD>
<TD >2</TD>
<TD >0</TD>
<TD >2</TD>
<TD >120</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_mux_001|arb|adder</TD>
<TD >36</TD>
<TD >18</TD>
<TD >0</TD>
<TD >18</TD>
<TD >18</TD>
<TD >18</TD>
<TD >18</TD>
<TD >18</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_mux_001|arb</TD>
<TD >13</TD>
<TD >0</TD>
<TD >4</TD>
<TD >0</TD>
<TD >9</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_mux_001</TD>
<TD >1074</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >128</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_mux|arb|adder</TD>
<TD >20</TD>
<TD >10</TD>
<TD >0</TD>
<TD >10</TD>
<TD >10</TD>
<TD >10</TD>
<TD >10</TD>
<TD >10</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_mux|arb</TD>
<TD >9</TD>
<TD >0</TD>
<TD >4</TD>
<TD >0</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_mux</TD>
<TD >598</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >124</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_demux_008</TD>
<TD >122</TD>
<TD >1</TD>
<TD >2</TD>
<TD >1</TD>
<TD >120</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_demux_007</TD>
<TD >122</TD>
<TD >1</TD>
<TD >2</TD>
<TD >1</TD>
<TD >120</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_demux_006</TD>
<TD >122</TD>
<TD >1</TD>
<TD >2</TD>
<TD >1</TD>
<TD >120</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_demux_005</TD>
<TD >122</TD>
<TD >1</TD>
<TD >2</TD>
<TD >1</TD>
<TD >120</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_demux_004</TD>
<TD >123</TD>
<TD >4</TD>
<TD >2</TD>
<TD >4</TD>
<TD >239</TD>
<TD >4</TD>
<TD >4</TD>
<TD >4</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_demux_003</TD>
<TD >123</TD>
<TD >4</TD>
<TD >2</TD>
<TD >4</TD>
<TD >239</TD>
<TD >4</TD>
<TD >4</TD>
<TD >4</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_demux_002</TD>
<TD >123</TD>
<TD >4</TD>
<TD >2</TD>
<TD >4</TD>
<TD >239</TD>
<TD >4</TD>
<TD >4</TD>
<TD >4</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_demux_001</TD>
<TD >123</TD>
<TD >4</TD>
<TD >2</TD>
<TD >4</TD>
<TD >239</TD>
<TD >4</TD>
<TD >4</TD>
<TD >4</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|rsp_demux</TD>
<TD >123</TD>
<TD >4</TD>
<TD >2</TD>
<TD >4</TD>
<TD >239</TD>
<TD >4</TD>
<TD >4</TD>
<TD >4</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_008</TD>
<TD >122</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_007</TD>
<TD >122</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_006</TD>
<TD >122</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_005</TD>
<TD >122</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_004|arb|adder</TD>
<TD >8</TD>
<TD >2</TD>
<TD >0</TD>
<TD >2</TD>
<TD >4</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_004|arb</TD>
<TD >6</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_004</TD>
<TD >241</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >121</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_003|arb|adder</TD>
<TD >8</TD>
<TD >2</TD>
<TD >0</TD>
<TD >2</TD>
<TD >4</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_003|arb</TD>
<TD >6</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_003</TD>
<TD >241</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >121</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_002|arb|adder</TD>
<TD >8</TD>
<TD >2</TD>
<TD >0</TD>
<TD >2</TD>
<TD >4</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_002|arb</TD>
<TD >6</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_002</TD>
<TD >241</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >121</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_001|arb|adder</TD>
<TD >8</TD>
<TD >2</TD>
<TD >0</TD>
<TD >2</TD>
<TD >4</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_001|arb</TD>
<TD >6</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux_001</TD>
<TD >241</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >121</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux|arb|adder</TD>
<TD >8</TD>
<TD >2</TD>
<TD >0</TD>
<TD >2</TD>
<TD >4</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux|arb</TD>
<TD >6</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_mux</TD>
<TD >241</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >121</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_demux_001</TD>
<TD >130</TD>
<TD >81</TD>
<TD >2</TD>
<TD >81</TD>
<TD >1072</TD>
<TD >81</TD>
<TD >81</TD>
<TD >81</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|cmd_demux</TD>
<TD >126</TD>
<TD >25</TD>
<TD >2</TD>
<TD >25</TD>
<TD >596</TD>
<TD >25</TD>
<TD >25</TD>
<TD >25</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_010|the_default_decode</TD>
<TD >0</TD>
<TD >9</TD>
<TD >0</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_010</TD>
<TD >113</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_009|the_default_decode</TD>
<TD >0</TD>
<TD >9</TD>
<TD >0</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_009</TD>
<TD >113</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_008|the_default_decode</TD>
<TD >0</TD>
<TD >9</TD>
<TD >0</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_008</TD>
<TD >113</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_007|the_default_decode</TD>
<TD >0</TD>
<TD >9</TD>
<TD >0</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_007</TD>
<TD >113</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_006|the_default_decode</TD>
<TD >0</TD>
<TD >9</TD>
<TD >0</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_006</TD>
<TD >113</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_005|the_default_decode</TD>
<TD >0</TD>
<TD >9</TD>
<TD >0</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_005</TD>
<TD >113</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_004|the_default_decode</TD>
<TD >0</TD>
<TD >9</TD>
<TD >0</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_004</TD>
<TD >113</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_003|the_default_decode</TD>
<TD >0</TD>
<TD >9</TD>
<TD >0</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_003</TD>
<TD >113</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_002|the_default_decode</TD>
<TD >0</TD>
<TD >9</TD>
<TD >0</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >9</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_002</TD>
<TD >113</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_001|the_default_decode</TD>
<TD >0</TD>
<TD >13</TD>
<TD >0</TD>
<TD >13</TD>
<TD >13</TD>
<TD >13</TD>
<TD >13</TD>
<TD >13</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router_001</TD>
<TD >113</TD>
<TD >0</TD>
<TD >6</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router|the_default_decode</TD>
<TD >0</TD>
<TD >13</TD>
<TD >0</TD>
<TD >13</TD>
<TD >13</TD>
<TD >13</TD>
<TD >13</TD>
<TD >13</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|router</TD>
<TD >113</TD>
<TD >0</TD>
<TD >6</TD>
<TD >0</TD>
<TD >120</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|key_3_s1_agent_rsp_fifo</TD>
<TD >153</TD>
<TD >39</TD>
<TD >0</TD>
<TD >39</TD>
<TD >112</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|key_3_s1_agent|uncompressor</TD>
<TD >45</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >43</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|key_3_s1_agent</TD>
<TD >307</TD>
<TD >39</TD>
<TD >46</TD>
<TD >39</TD>
<TD >331</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|key_2_s1_agent_rsp_fifo</TD>
<TD >153</TD>
<TD >39</TD>
<TD >0</TD>
<TD >39</TD>
<TD >112</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|key_2_s1_agent|uncompressor</TD>
<TD >45</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >43</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|key_2_s1_agent</TD>
<TD >307</TD>
<TD >39</TD>
<TD >46</TD>
<TD >39</TD>
<TD >331</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sw_s1_agent_rsp_fifo</TD>
<TD >153</TD>
<TD >39</TD>
<TD >0</TD>
<TD >39</TD>
<TD >112</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sw_s1_agent|uncompressor</TD>
<TD >45</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >43</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sw_s1_agent</TD>
<TD >307</TD>
<TD >39</TD>
<TD >46</TD>
<TD >39</TD>
<TD >331</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|led_s1_agent_rsp_fifo</TD>
<TD >153</TD>
<TD >39</TD>
<TD >0</TD>
<TD >39</TD>
<TD >112</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|led_s1_agent|uncompressor</TD>
<TD >45</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >43</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|led_s1_agent</TD>
<TD >307</TD>
<TD >39</TD>
<TD >46</TD>
<TD >39</TD>
<TD >331</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sysid_qsys_0_control_slave_agent_rsp_fifo</TD>
<TD >153</TD>
<TD >39</TD>
<TD >0</TD>
<TD >39</TD>
<TD >112</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sysid_qsys_0_control_slave_agent|uncompressor</TD>
<TD >45</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >43</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sysid_qsys_0_control_slave_agent</TD>
<TD >307</TD>
<TD >39</TD>
<TD >46</TD>
<TD >39</TD>
<TD >331</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sdram_pll_pll_slave_agent_rsp_fifo</TD>
<TD >153</TD>
<TD >39</TD>
<TD >0</TD>
<TD >39</TD>
<TD >112</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sdram_pll_pll_slave_agent|uncompressor</TD>
<TD >45</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >43</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sdram_pll_pll_slave_agent</TD>
<TD >307</TD>
<TD >39</TD>
<TD >46</TD>
<TD >39</TD>
<TD >331</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sdram_s1_agent_rdata_fifo</TD>
<TD >79</TD>
<TD >41</TD>
<TD >0</TD>
<TD >41</TD>
<TD >36</TD>
<TD >41</TD>
<TD >41</TD>
<TD >41</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sdram_s1_agent_rsp_fifo</TD>
<TD >153</TD>
<TD >39</TD>
<TD >0</TD>
<TD >39</TD>
<TD >112</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sdram_s1_agent|uncompressor</TD>
<TD >45</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >43</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sdram_s1_agent</TD>
<TD >307</TD>
<TD >39</TD>
<TD >46</TD>
<TD >39</TD>
<TD >331</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|onchip_memory2_0_s1_agent_rsp_fifo</TD>
<TD >153</TD>
<TD >39</TD>
<TD >0</TD>
<TD >39</TD>
<TD >112</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|onchip_memory2_0_s1_agent|uncompressor</TD>
<TD >45</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >43</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|onchip_memory2_0_s1_agent</TD>
<TD >307</TD>
<TD >39</TD>
<TD >46</TD>
<TD >39</TD>
<TD >331</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|nios2_qsys_0_jtag_debug_module_agent_rsp_fifo</TD>
<TD >153</TD>
<TD >39</TD>
<TD >0</TD>
<TD >39</TD>
<TD >112</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|nios2_qsys_0_jtag_debug_module_agent|uncompressor</TD>
<TD >45</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >43</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|nios2_qsys_0_jtag_debug_module_agent</TD>
<TD >307</TD>
<TD >39</TD>
<TD >46</TD>
<TD >39</TD>
<TD >331</TD>
<TD >39</TD>
<TD >39</TD>
<TD >39</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|nios2_qsys_0_data_master_agent</TD>
<TD >195</TD>
<TD >40</TD>
<TD >87</TD>
<TD >40</TD>
<TD >145</TD>
<TD >40</TD>
<TD >40</TD>
<TD >40</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|nios2_qsys_0_instruction_master_agent</TD>
<TD >195</TD>
<TD >40</TD>
<TD >87</TD>
<TD >40</TD>
<TD >145</TD>
<TD >40</TD>
<TD >40</TD>
<TD >40</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|key_3_s1_translator</TD>
<TD >113</TD>
<TD >7</TD>
<TD >30</TD>
<TD >7</TD>
<TD >36</TD>
<TD >7</TD>
<TD >7</TD>
<TD >7</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|key_2_s1_translator</TD>
<TD >113</TD>
<TD >7</TD>
<TD >30</TD>
<TD >7</TD>
<TD >36</TD>
<TD >7</TD>
<TD >7</TD>
<TD >7</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sw_s1_translator</TD>
<TD >113</TD>
<TD >7</TD>
<TD >30</TD>
<TD >7</TD>
<TD >36</TD>
<TD >7</TD>
<TD >7</TD>
<TD >7</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|led_s1_translator</TD>
<TD >113</TD>
<TD >7</TD>
<TD >30</TD>
<TD >7</TD>
<TD >70</TD>
<TD >7</TD>
<TD >7</TD>
<TD >7</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sysid_qsys_0_control_slave_translator</TD>
<TD >113</TD>
<TD >7</TD>
<TD >28</TD>
<TD >7</TD>
<TD >35</TD>
<TD >7</TD>
<TD >7</TD>
<TD >7</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sdram_pll_pll_slave_translator</TD>
<TD >113</TD>
<TD >7</TD>
<TD >27</TD>
<TD >7</TD>
<TD >70</TD>
<TD >7</TD>
<TD >7</TD>
<TD >7</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|sdram_s1_translator</TD>
<TD >113</TD>
<TD >5</TD>
<TD >4</TD>
<TD >5</TD>
<TD >98</TD>
<TD >5</TD>
<TD >5</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|onchip_memory2_0_s1_translator</TD>
<TD >113</TD>
<TD >8</TD>
<TD >27</TD>
<TD >8</TD>
<TD >75</TD>
<TD >8</TD>
<TD >8</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|nios2_qsys_0_jtag_debug_module_translator</TD>
<TD >113</TD>
<TD >6</TD>
<TD >20</TD>
<TD >6</TD>
<TD >82</TD>
<TD >6</TD>
<TD >6</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|nios2_qsys_0_data_master_translator</TD>
<TD >114</TD>
<TD >13</TD>
<TD >0</TD>
<TD >13</TD>
<TD >105</TD>
<TD >13</TD>
<TD >13</TD>
<TD >13</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0|nios2_qsys_0_instruction_master_translator</TD>
<TD >114</TD>
<TD >52</TD>
<TD >0</TD>
<TD >52</TD>
<TD >105</TD>
<TD >52</TD>
<TD >52</TD>
<TD >52</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|mm_interconnect_0</TD>
<TD >393</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >298</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|key_3</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|key_2</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|sw</TD>
<TD >12</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|sysid_qsys_0</TD>
<TD >3</TD>
<TD >19</TD>
<TD >2</TD>
<TD >19</TD>
<TD >32</TD>
<TD >19</TD>
<TD >19</TD>
<TD >19</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|sdram_pll|sd1</TD>
<TD >3</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >6</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|sdram_pll|stdsync2|dffpipe3</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|sdram_pll|stdsync2</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|sdram_pll</TD>
<TD >38</TD>
<TD >30</TD>
<TD >30</TD>
<TD >30</TD>
<TD >34</TD>
<TD >30</TD>
<TD >30</TD>
<TD >30</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|sdram|the_lab7_soc_sdram_input_efifo_module</TD>
<TD >66</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >66</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|sdram</TD>
<TD >66</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >58</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|led</TD>
<TD >38</TD>
<TD >24</TD>
<TD >24</TD>
<TD >24</TD>
<TD >40</TD>
<TD >24</TD>
<TD >24</TD>
<TD >24</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|onchip_memory2_0|the_altsyncram|auto_generated</TD>
<TD >41</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|onchip_memory2_0</TD>
<TD >44</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_jtag_debug_module_wrapper|the_lab7_soc_nios2_qsys_0_jtag_debug_module_sysclk</TD>
<TD >43</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >51</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_jtag_debug_module_wrapper|the_lab7_soc_nios2_qsys_0_jtag_debug_module_tck</TD>
<TD >130</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >43</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_jtag_debug_module_wrapper</TD>
<TD >123</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >53</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_im</TD>
<TD >97</TD>
<TD >36</TD>
<TD >93</TD>
<TD >36</TD>
<TD >48</TD>
<TD >36</TD>
<TD >36</TD>
<TD >36</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_pib</TD>
<TD >39</TD>
<TD >20</TD>
<TD >38</TD>
<TD >20</TD>
<TD >19</TD>
<TD >20</TD>
<TD >20</TD>
<TD >20</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_fifo|the_lab7_soc_nios2_qsys_0_oci_test_bench</TD>
<TD >36</TD>
<TD >0</TD>
<TD >36</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_fifo|the_lab7_soc_nios2_qsys_0_nios2_oci_fifo_cnt_inc</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_fifo|the_lab7_soc_nios2_qsys_0_nios2_oci_fifo_wrptr_inc</TD>
<TD >4</TD>
<TD >2</TD>
<TD >0</TD>
<TD >2</TD>
<TD >4</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_fifo|the_lab7_soc_nios2_qsys_0_nios2_oci_compute_input_tm_cnt</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_fifo</TD>
<TD >151</TD>
<TD >0</TD>
<TD >65</TD>
<TD >0</TD>
<TD >36</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_dtrace|lab7_soc_nios2_qsys_0_nios2_oci_trc_ctrl_td_mode</TD>
<TD >9</TD>
<TD >0</TD>
<TD >6</TD>
<TD >0</TD>
<TD >4</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_dtrace</TD>
<TD >114</TD>
<TD >0</TD>
<TD >103</TD>
<TD >0</TD>
<TD >72</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_itrace</TD>
<TD >25</TD>
<TD >17</TD>
<TD >23</TD>
<TD >17</TD>
<TD >87</TD>
<TD >17</TD>
<TD >17</TD>
<TD >17</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_dbrk</TD>
<TD >99</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >103</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_xbrk</TD>
<TD >65</TD>
<TD >5</TD>
<TD >62</TD>
<TD >5</TD>
<TD >6</TD>
<TD >5</TD>
<TD >5</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_break</TD>
<TD >52</TD>
<TD >36</TD>
<TD >6</TD>
<TD >36</TD>
<TD >71</TD>
<TD >36</TD>
<TD >36</TD>
<TD >36</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_avalon_reg</TD>
<TD >48</TD>
<TD >0</TD>
<TD >29</TD>
<TD >0</TD>
<TD >68</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_ocimem|lab7_soc_nios2_qsys_0_ociram_sp_ram|the_altsyncram|auto_generated</TD>
<TD >47</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_ocimem|lab7_soc_nios2_qsys_0_ociram_sp_ram</TD>
<TD >47</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_ocimem</TD>
<TD >92</TD>
<TD >0</TD>
<TD >6</TD>
<TD >0</TD>
<TD >65</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci|the_lab7_soc_nios2_qsys_0_nios2_oci_debug</TD>
<TD >50</TD>
<TD >1</TD>
<TD >30</TD>
<TD >1</TD>
<TD >7</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_nios2_oci</TD>
<TD >180</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >69</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|lab7_soc_nios2_qsys_0_register_bank_b|the_altsyncram|auto_generated</TD>
<TD >44</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|lab7_soc_nios2_qsys_0_register_bank_b</TD>
<TD >44</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|lab7_soc_nios2_qsys_0_register_bank_a|the_altsyncram|auto_generated</TD>
<TD >44</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|lab7_soc_nios2_qsys_0_register_bank_a</TD>
<TD >44</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0|the_lab7_soc_nios2_qsys_0_test_bench</TD>
<TD >305</TD>
<TD >3</TD>
<TD >271</TD>
<TD >3</TD>
<TD >33</TD>
<TD >3</TD>
<TD >3</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc|nios2_qsys_0</TD>
<TD >149</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >131</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >m_lab7_soc</TD>
<TD >12</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >33</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
</TABLE>
